System Design of Broadband ΣΔ Modulator for ADSL Applications

Asymmetric digital subscriber line (ADSL) is a broadband access network technology and needs broadband and high precision analog to digital convertors. ΣΔ modulator has the advantages of high resolution and low power, but its bandwidth is low because of adopting the oversampling technology. In order to increase the bandwidth for broadband applications, the system design of a broadband two-channel second-order ΣΔ modulator for ADSL applications is presented, which is based on the digital block filer theory. The effective sampling frequency of the modulator can be doubled with keeping the system clock frequency unchanging, which makes the bandwidth of the modulator double. To reduce the folded noise caused by mismatch between two channels, a band-pass filter is adopted. The system model with mismatch between two channels is built and simulated by SIMULINK. Simulation results show that the modulator achieves a signal to noise and distortion ratio of 83.9dB and a bandwidth of 1.1MHz with the system clock frequency of 71.4 MHz and mismatch of 0.5% between two channels. Furthermore, the modulator has the ability of idle tones suppression and does not need the dither signal generated by extra circuit to suppress the idle tones, reducing the complexity of the circuit.