Abstract:
The digital quadrature demodulator( DQD ) is an important module in Software Defined Radio (SDR) receiver, and digital quadrature mixing algorithm is often used in the digital quadrature demodulator. In this paper, we present a reasonable improved architecture for digital quadrature mixing algorithm based on theory derivation. The improved architecture can meet the need of the multi-band intermediate frequency (IF) signal feature. In this new architecture, two courses of quadrature demodulation and lowpass filtering are combined together as one module, and Low-Pass Filter (LPF) does filtering output once every M input samples. Theoretical analysis and test on programmable logic device FPGA show, the new architecture can complement digital quadrature mixing algorithm, also can apparently decrease needed RAM and multipliers of FPGA. When the FPGA resources is same, this architecture can efficiently improve adjacent channel isolation performance of mult-band IF digital quadrature demodulator, or remarkably raise sampling rate of front-end Analog Digital Convertor (ADC).