基于运动模型的雷达箔条干扰回波仿真及其FPGA实现

FPGA Implementation of High-Fidelity Radar Chaff Clutter Based on a Kinematic Model

  • 摘要: 随着现代雷达系统的飞速发展,无源干扰技术始终是一项核心挑战,是制约其性能并亟待突破的关键问题。箔条作为一种成本低廉、干扰效果显著的无源干扰手段,其核心机理在于模拟真实目标的雷达回波特性,实现对雷达信号处理系统的欺骗或压制。然而,受限于外场试验条件难以获取充分数据,研究中常采用仿真方法模拟箔条回波。现有软件仿真方法虽能实现较高精度,但面临计算量巨大、耗时长及硬件资源需求高等问题;传统硬件仿真方法多基于分布特性进行拟合,难以对箔条运动特性进行精细化建模。针对上述问题,本文提出一种基于运动模型的雷达箔条干扰回波现场可编程门阵列(Field-Programmable Gate Array, FPGA)实时生成方案,能够充分发挥FPGA在流水线运算与可重构架构方面的优势,将复杂运动模型算法映射至高效的硬件逻辑结构中。首先,提出一种融合动力学建模与电磁散射理论的混合建模方法,通过逐脉冲计算每根箔条的雷达散射截面(Radar Cross-Section, RCS),替代传统基于平均RCS的近似处理,从而显著提升了仿真精度;其次,在FPGA硬件实现中,设计了一种基于脉冲维状态迭代的并行处理结构,将箔条位置、速度等状态的时域演化映射为可流水执行的硬件数据流,以较低控制复杂度实现海量箔条在多脉冲间状态的同步并行更新;最后,针对长序列卷积运算,提出一种频域分段卷积方法,有效缓解传统方法对DSP资源的过度占用,并能够根据信号长度灵活平衡资源消耗、时延与系统复杂度间的关系。为验证所提方法的正确性与有效性,本文将FPGA与MATLAB的仿真结果与实测雷达箔条干扰回波分布并进行柯尔莫哥洛夫—斯米尔诺夫(Kolmogorov-Smirnov, KS)检验进行统计分析,结果验证了所提模型的准确性以及FPGA实现方法的有效性。

     

    Abstract: The rapid evolution of radar systems has made electronic countermeasures a critical area of research. Among these, passive jamming remains a severe threat to radar performance. Chaff, a passive countermeasure, is widely used because of its low cost and proven effectiveness. Its core mechanism is to mimic the radar echoes of real targets, thereby deceiving or overwhelming radar signal processors. However, a major challenge in chaff research is the difficulty and high cost of obtaining comprehensive data from real-world experiments. As a result, simulation has become the primary approach for studying chaff echoes. Existing simulation methods fall into two categories: software-based and hardware-based. Software simulations can achieve high accuracy but are limited by heavy computational requirements, leading to long simulation times and high resource consumption. By contrast, conventional hardware simulations often rely on statistical approximations of chaff clouds. While faster, these methods typically fail to capture the intricate and dynamic motion of individual chaff strands, resulting in oversimplified and potentially inaccurate jamming models. To overcome these limitations, this study proposes a real-time field-programmable gate array (FPGA)-based scheme for generating radar chaff interference echoes using a motion model. The scheme fully leverages the advantages of FPGA-based pipeline processing and reconfigurable architecture by mapping complex motion model algorithms into efficient hardware logic structures. First, a hybrid modeling method integrating dynamic modeling and electromagnetic scattering theory is introduced. By calculating the radar cross-section (RCS) of each chaff filament on a per-pulse basis, the method replaces the traditional approximation based on average RCS, thereby significantly improving simulation accuracy. Second, in the FPGA implementation, a parallel processing architecture based on pulse-dimension state iteration is designed. This architecture maps the temporal evolution of chaff states, such as position and velocity, into a hardware dataflow that can be executed in a pipelined manner, enabling synchronous parallel updates of massive chaff states across multiple pulses with low control complexity. Finally, for long-sequence convolution operations, a frequency-domain segmented convolution method is proposed. This method effectively alleviates the excessive DSP resource consumption in traditional approaches and enables flexible balancing between resource usage and system latency based on signal length. To validate the correctness and effectiveness of the proposed method, statistical analysis is conducted using the Kolmogorov-Smirnov (KS) test to compare simulated results from both FPGA and MATLAB implementations with measured radar chaff interference echo distributions. The results confirm the accuracy of the proposed model and the effectiveness of the FPGA implementation.

     

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